New flight control computers are being introduced on the next space shuttle flight. Built by IBM, the new processors have been under development for seven years.
Increasingly complex applications have strained the memory capacity of the current processors, so the new models introduce a major change in memory technology: solid state memory, as opposed to the ferrite core memory used to date. The 64kb chips employed make possible a total memory capacity of 1 Megabyte of memory, well above the 608 Kilobytes used to date. The engineers have even figured out how to have more than one program loaded into memory at a time, so that new code will sometimes not have to be loaded from tape every time users switch to a different application.
Naturally the new technology allows maximum performance increases, and the new machines operate at 1.2 Mips, triple the level of the current model. Weight of the CPU unit is reduced by nearly half, down to 64 pounds. Reliability has been increased by a factor of 4, to slightly above that of an entry level home computer, allowing NASA to continue getting by with only 5 way redundancy.
The initial run of 40 processors for shuttle installation will cost only $1,000,000 apiece (not including development costs). It is hoped that once volume production is achieved, an additional 60 units for ground support will be produced at only $500,000 each. It does not appear that the processor will be offered for sale in the civilian workstation market.
Long Live Spinoff!
None of this is made up. It (and worse) is all documented in the 25 February 1991 Electronic Engineering Times.
Author unknown.
